Cooling a CPU with TECs

Over the past summer I’ve been doodling on a design for a computer case; it’s been my opportunity to continue to perform the act of engineering while not programming. An important element in many of my design iterations is the Peltier Thermal Electric Cooler, or TEC. Scouring the internet I found lots of confusion on how these devices operate and wanted to take an opportunity to clear some of the confusion in case anyone is interested and finds this.

The internet swiftly answers the question: what are TECs? They are a semiconductor device that moves heat from one side to another when a voltage is applied across it. When thinking about computer cooling they can fulfill one of two purposes: forcing the transfer of heat from one side to another; or dropping the temperature on the cold side of the device.

These two purposes are illustrated by the performance characteristics of the devices. When transferring no heat they create the maximum temperature difference between their two sides; when transferring the maximum amount of heat the two sides’ temperatures will be roughly equal.

Running a TEC at its limit

We’ll examine the TE Technology, Inc.’s TE-127-2.0-1.5 for our examples.

Our example shows a Qmax of 122.0 W but this information isn’t that helpful to us by itself. It doesn’t tell us the performance characteristics of the device and it doesn’t tell us how to design our voltages or predict our temperatures. We can assume a few characteristics of the device but ideally we want to find datasheets for TECs that show the device’s operating characteristics.

The graphs above show the operating characteristics of our example device when the hot side is 30º C. The graphs will be different when the hot side is at different temperatures. Thankfully they aren’t dramatically different but most manufacturers will provide graphs at two or three hot-side temperatures – often at 30º C, 50º C, and maybe at 70º C.

The hot-side temperature is important and will be key in determining how cold the cold side will get.

The graph with heat and temperature difference (in the top left) will be the primary chart we use to plan our project. It tells us what voltage we will need to apply in order to reach a certain temperature difference at each amount of heat we want or have to transfer.

Let’s suppose that we want to cool a CPU with a TDP of 100 W. For the moment we have to ignore the fact that CPUs will consume considerably more power than their rated TDP; we are simplifying this for the sake of the example.

Now what temperature do you want your CPU to run at? Want to get down to 10º C? Is 50º C enough? Let’s find out what we can do!

We’ve found the 100 W line on our heat removed or Qc graph. The 15.5 V diagonal line shows us the maximum values for the TEC and we cannot push out further to the right beyond there. The inner lines represent performance at lower and lower utilization of the device. We can go all the way to zero though the graph stops showing us the performance at a reasonable low end.

This graph tells us that we will be unable to transfer 100 W of power with anything much lower than 8.9 V (though we can do so for a voltage slightly lower than 8.9 V). We can see that at a maximum voltage of 15.5 V we can expect the cold side to be roughly 15º C colder than the hot side while dropping the voltage to 8.9 V brings the temperature difference down to zero.

This part of the design is somewhat of a cat-and-mouse game, or a calculus problem. We have to approximate what the hot side of the TEC will be and work back and forth to find the cold-side temperature. If we know that we have a cooling system which can remove as much heat as we provide then we can assume that the hot side will remain at 30º C and this becomes easy. Oftentimes though we have a heat sink on the hot side or a sufficient-but-not-unlimited water cooling system.

At one point I was looking at a heat sink with a thermal resistance rating of 0.15 K / W. The cooling system or heat sink will have to dissipate our CPU’s power plus whatever inefficiencies that the TEC introduces. With a first order approximation we can assume that our room’s air temperature is 30º C and that the TEC is 100% efficient.

\Delta T_{heatsink} = 100 W \cdot 0.15 \displaystyle \frac{K}{W} = 15 \textdegree C

The hot side of our heat sink (and vis a vis the hot side of the TEC) will be 15º C above the ambient temperature, which in our case becomes 45º C. This places us closer to the chart showing performance at 50º C than the one at 30º C so we’ll have to revise, but we can continue to approximate some more first.

If we’re using the TEC at its rated maximum voltage of 15.5 V we can look to the waste heat chart and discover what inefficiencies we’re dealing with.

The first chart showed us that at 100 W we can choose to cool from zero to about a 15º difference in temperature between the sides of the TEC. On the waste heat chart we can therefore look at that range at the given maximum voltage to estimate the total heat sent to our heat sink. At high loading values or voltages the TECs become fairly inefficient; at high temperature differences they become even worse. Here we can see that to move 100 W and maintain a 15º C difference our TEC will have to exhaust a total heat load of around 340 W to 370 W.

The Coefficient of Performance graph is another way to visualize the (in)efficiency.

Lower voltages and smaller temperature differentials can
actually result in reasonably-efficient heat transfer.

On this graph we start by looking at our input voltage or trace along a temperature differential plot. As with the other graphs, values exist between the lines but the manufacturers choose a few which illustrate the overall characteristics and correspond to the values in the other graphs.

As we look at this chart at 15.5 V we can see that the coefficient of performance (CoP) never exceeds 0.5 regardless of the temperature difference between the two sides of the TEC. The CoP is a ratio of the amount of power that the TEC uses in order to transfer the given power from its cold side. It will match the waste heat graph (and the current/voltage graph).

Q_{TEC} = Q_c \div CoP \approx 100 W \div 0.4 \approx 250 W

Q_{waste} = Q_{TEC} + Q_c \approx 250 W + 100 W \approx 350 W

The waste heat then is the total heat output from the TEC including the heat we’re transferring and the overhead of the TEC itself. If we plug this back into the heat sink we can see that it would push up our hot-side temperature even further.

\Delta T_{heatsink} = 350 W \cdot 0.15 \displaystyle \frac{K}{W} = 52.5 \textdegree C

Wow! At 30º C ambient temperature our hot side soars to around 80º C instead of our original estimate of 30º C. TECs can be extremely inefficient when we push them to their max. Note that at these values we’re looking at having the cold side of the TEC at 65º C and therefore the CPU will run at least that hot. Probably the CPU will run at or near its thermal limit of 100º C due to the limits of the CPU itself to transfer heat to the TEC.

Running a TEC at half its limit

Let’s iterate on our design and relax the requirements. Suppose that we can buy two devices to share the heat load. We’ll start back at that first graph but we’ll be considering half of the Qc value we were before. We’re assuming here that we can effectively split the heat load across both of them but with something like a CPU that’s usually hard enough that it’s an invalid assumption.

At a glance we can see that our maximum temperature differential has now risen to over 40º C between the cold and hot sides of the TEC. By reducing the transferred heat some of the “spare headroom” can be shifted from heat transfer to temperature reduction. However, for the sake of this exercise we’ll refrain from doing that – we’ll stick to our original hope of running the CPU at 15º C below the hot side even though we haven’t defined what absolute temperature that would be.

A 15º C difference at 50 W corresponds to a 5.9 V drop across the TEC. Since we’re not changing the heat sink we know that the temperature rise above ambient will still correspond to 100 W of power and thus our first approximation is 15º C above the ambient air temperature.

The 5.9 V level gives us a wider spread of efficiency and waste heat. The CoP graph not only crosses the 1:1 line, where we are wasting as much heat as we are transferring, but runs up to about 2.5 when the two sides of the TEC are equal. That means when we are transferring so much heat that the two sides have the same temperature that we are transferring two and a half times as much power as the TEC itself is consuming.

Again, we’re sticking at our original goal of a 15º C differential. The waste heat graph shows us that we will exhaust between 75 W and 100 W total for the 50 W we’re transferring. From the CoP we can hopefully arrive at that same estimate. We’ll have to interpolate between the DT=9.7 and the DT=19.5 plots to estimate at DT=15.

Q_{TEC} = Q_c \div CoP \approx 50 W \div 1.6 \approx 31W

Q_{waste} = Q_{TEC} + Q_c \approx 31 W + 50 W \approx 81 W

Thankfully the numbers correspond. Doubling that and placing the load back at our heat sink we can see that we’re ejecting a total of about 160 W – much lower than with the single TEC.

\Delta T_{heatsink} = 162 W \cdot 0.15 \displaystyle \frac{K}{W} = 24.3 \textdegree C

That’s less than half the temperature rise as before and it brings our hot-side temperature up to 54.3º C and (less the 15º C differential) our cold-side temperature to around 40º C. Our CPU will now probably max out at around 80º C. We’ve cooled our CPU 20º C lower than with one TEC and we’ve done so with considerably less power loss. The tradeoff is a higher price up-front involving the purchase of a second TEC plus whatever changes we have to make in order to efficiently transfer the heat to two devices from the CPU.

This result should surprise us and it’s a derivative of how drastically the efficiency of TEC devices drop as we push them against their designed limits.

Running a TEC at its most-efficient state

In this final iteration we’re going to skip some of the details and get right to the numbers. The black curve on the first graph, showing the transferred heat, shows the point at each voltage where the CoP is at its peak. If we run the TEC along this curve then we’ll always be running at the peak efficiency for each possible temperature differential.

Our most-efficient voltage for a 15º C differential between the hot and cold sides of this example TEC is just over 3 V which transfers 20 W of heat. The total exhausted waste heat from the graph is around 25W. From the CoP plot we estimate the CoP to be between 2.0 and 2.5 which gives an estimated waste heat (for 20 W of transferred head) of 28 W to 30 W.

If the CPU is the same then it will require five TECs transferring 20 W each and we’ll dump probably around 130 W into the heat sink.

\Delta T_{heatsink} = 130 W \cdot 0.15 \displaystyle \frac{K}{W} = 19.5 \textdegree C

The hot side of the TEC and the heat sink will hover at 50º C, the cold side of the TEC and the hot side of the CPU will drop to 35º C, and the internal CPU temperature will probably peak at around 70ºC to 75ºC. We remember that the cooler the CPU temperature is the less power it will draw and we’ll receive some recursive benefit to our cooling.

Choosing a running point

We can see that jumping from one to two of the same TEC devices brought substantial reductions in the running temperature of the CPU and increased our efficiency at the increased cost of construction. The jump from two to five didn’t bring as big of a jump despite incurring a much higher cost.

It’s important to note though that we were looking at a scenario where a single TEC would suffice if we’re comfortable with its limits. In my own testing I have seen my CPU consume near 250 W of power. As the amount of heat we’re wanting to transfer away from the CPU increases we’re going to hit the dramatic inefficiency spikes much sooner and multiple TEC devices will not only become more efficient but also imperative.

When we’re designing a cooling solution we have to take a few iterative steps as we did here and try to find the resting point where the overhead from the TEC balances with the ability of the heat sink to dissipate its own heat. We can’t take a TEC with a 150 W rating and assume it will be able to cool 150 W or even 100 W. We need the performance graphs or estimates of the performance and we have to pair that information with the ability of our heat sink(s) or water-cooling loop to extract the heat into the room.

If we design a water-cooling case with massive radiators and fans that can extract as much heat as we can throw at it then we can simplify our calculations and always assume that the hot side of the TEC will be fixed at the room temperature (or at 30º C for extra safety) and that the efficiency losses won’t impact the temperature drop across the TEC. On the other hand, as we saw in our example, if our heat sink is more realistic and our airflow is restricted then the running-point and efficiency of the TEC plays a much bigger role – so big a role that even our 40º C temperature differential across the sides of the TEC could still mean that the cold side sits above ambient temperature.

Quick facts

We cannot select a temperature drop for a TEC device. We fix a voltage across the device and it responds as a result of the amount of heat entering its cold side and leaving its hot side. The resistance of the TEC does determine how much current will flow for a given voltage but the temperatures are dependent upon the heat and heat flow through both sides. This is why we can have a 15º C drop across the TEC at the same time that the cold side temperature sits above the ambient temperature.


If we try to push more heat into a TEC than it is rated to handle at a given voltage then it won’t cool as we expect it to. It will continue to transfer heat from one side to the other but the temperatures on both sides will steadily increase.


We can couple TECs with water-cooling loops but we have to be careful how they interact. If we try simply to cool the water inside our existing loop then we risk bringing the temperature of the water running into the radiators below the ambient room temperature. If this happens then our radiators will end up sucking heat from the room and pushing it into the water, raising its temperature back up to the ambient level. We have to use the TECs in such a way that they end up increasing the temperature of the water in our existing loops or utilize two independent loops with the TECs transferring heat between them.

The numbers are made up and the points don’t matter, but it gets the point across.

Likewise, TECs can do weird things in normal air-cooling environments due to the way that the temperatures split across their sides. If there were no efficiency losses in the devices then some slightly hair-brained ideas might be more practical.

There are hybrid coolers which risk attempting to defy physics.

It’s possible to go too low with the heat transfer when trying to increase the overall efficiency. If we tried to cool our CPU in the example with a pack of twenty-five cheap TECs that we purchased from eBay or AliExpress we can’t simply drop the voltage down to near zero and keep our 15º C drop. Each temperature differential has a minimum voltage requirement below which the temperatures start to equalize. If we look at the CoP graph we can see that it’s not possible to achieve a 15º C differential with much less than 2 V. On the other hand, if we tried to reach a 40º C differential by carrying the 4 W with 5.9 V then even with twenty-five TECs the efficiency losses would push the hot side to 113º C and therefore the cold side to over 72º C.


As demonstrated, because of the efficiency losses introduced as we push our TECs harder, there’s a point where increasing the voltage will decrease the temperature differential across the device. Use the charts to find the balance between transferred heat, temperature differential, efficiency loss from the TEC itself, and the ability of the heat sink/water-cooling loop/cooling system to exhaust all of total combined heat into the room or surrounding air.


It’s possible to build a stack of TECs to continue dropping the temperature differential across the entire stack while keeping the TECs at their prime high-CoP operating points: each stage though has to carry not only the transferred heat from the previous stage but also the additional efficiency losses from all previous stages combined. The complexity scales extravagantly and the idea becomes quickly impractical – but hey, it’s just money!

Stacking TECs like this is worse in reality than a 1:2:3 ratio.

And finally, remember that
the Qc, Qmax, or Q ratings are simply not enough!

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